The Senior Principal Project Team Leader is responsible for establishing and managing ASIC project schedule and cost analysis, earned value determination, monthly estimation at completion and estimate reporting for both labor and material forecasting for large scale system-on-chip digital ASIC development and mixed-signal ASIC developments. The successful candidate will be continuously evaluate and update risk and opportunity management to resolve critical issues and ensuring on-target program milestones including design gates. The position also includes managing any changes to the baseline plan if needed, optimizing resource/staffing deployment, defining and tracking critical path and task dependencies to ensure successful project objective attainment, schedule and financial performance. The Senior Project Leader will also contribute to interchange meetings with Internal and External Customers.
Candidates will work closely with the ASIC development team on a daily basis and interface with the program manager, chief engineer, systems, software and test engineers, IP providers and design partners. Duties include:
- Developing and owning a detailed master schedule by working with technical leads that meets program objectives
- Interfacing continuously with the development team and technical leads to manage project execution
- Managing project dependencies of multiple supporting functional disciplines such as systems, software and test
- Managing IP providers, design service providers and foundry partners
- Interfacing with the program manager, chief engineer and customer to report progress, plans realized and future potential risks and opportunities.
- Interfacing with overall program management and the chief engineer to create presentations for internal weekly and monthly program reviews.
- Note this position can be located in El Segundo CA, Dallas TX or Nashua NH. Telecommuting is available for motivated self directed candidates.
- Ability to lead multi-site, multi-functional project teams to develop complex ASIC System-on-Chip designs from concept through design, verification, test, qualification and system insertion.
- Ability to organize and facilitate cross-functional collaboration to ensure product development targets are met, on schedule and within financial and resource constraints
- Ability to establish detailed project development plans, track earned value, critical path and task dependencies, determine risks and actively manage risk avoidance.
- ASIC design and development knowledge including digital design, advanced verification methodologies, custom analog design and related flows
- Demonstrated ability to work with IP and design service partners
- Ability to effectively communicate and interface with internal and external stakeholders, customers and partners
- Ability to prioritize and manage multiple concurrent tasks
BSEE or BSCE or related STEM degree
BS and 10 years of experience, MS and 8 years of experience, PhD and 6 years of experience.Preferred Education:
MBA, MS or PhDThis position requires either a U.S. Person or a Non-U.S. Person who is eligible to obtain any required Export Authorization.The ability to obtain and maintain a US security clearance. U.S. citizenship is required as only U.S. citizens are eligible for a security clearance
Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender orientation, gender identity, national origin, disability, or protected Veteran status.